View ADG438_121736.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

a
High Performance 4/8 Channel Fault-Protected Analog Multiplexers ADG438F/ADG439F*
FUNCTIONAL BLOCK DIAGRAMS
ADG438F
S1 S1A DA S4A D S1B DB S8 1 OF 8 DECODER S4B 1 OF 4 DECODER
FEATURES Fast Switching Times tON 250 ns max tOFF 150 ns max Fault and Overvoltage Protection (-40 V, +55 V) All Switches OFF with Power Supply OFF Analog Output of ON Channel Clamped Within Power Supplies If an Overvoltage Occurs Latch-Up Proof Construction Break Before Make Construction TTL and CMOS Compatible Inputs APPLICATIONS Data Acquisition Systems Industrial and Process Control Systems Avionics Test Equipment Signal Routing Between Systems High Reliability Control Systems
ADG439F
A0 A1 A2 EN
A0 A1 EN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG438F/ADG439F are CMOS analog multiplexers, the ADG438F comprising 8 single channels and the ADG439F comprising four differential channels. These multiplexers provide fault protection. Using a series n-channel, p-channel, nchannel MOSFET structure, both device and signal source protection is provided in the event of an overvoltage or power loss. The multiplexer can withstand continuous overvoltage inputs from -40 V to +55 V. During fault conditions, the multiplexer input (or output) appears as an open circuit and only a few nanoamperes of leakage current will flow. This protects not only the multiplexer and the circuitry driven by the multiplexer, but also protects the sensors or signal sources which drive the multiplexer. The ADG438F switches one of eight inputs to a common output as determined by the 3-bit binary address lines A0, A1 and A2. The ADG439F switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN input on each device is used to enable or disable the device. When disabled, all channels are switched OFF.
1. Fault Protection. The ADG438F/ADG439F can withstand continuous voltage inputs up to -40 V or +55 V. When a fault occurs due to the power supplies being turned off, all the channels are turned off and only a leakage current of a few nanoamperes flows. 2. ON channel turns OFF while fault exists. 3. Low RON. 4. Fast Switching Times. 5. Break-Before-Make Switching. Switches are guaranteed break-before-make so that input signals are protected against momentary shorting. 6. Trench Isolation Eliminates Latch-up. A dielectric trench separates the p- and n-channel MOSFETs thereby preventing latch-up. 7. Improved OFF Isolation. Trench isolation enhances the channel-to-channel isolation of the ADG438F/ADG439F.
*Patent Pending.
REV. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2000
ADG438F/ADG439F-SPECIFICATIONS1
Dual Supply
Parameter ANALOG SWITCH Analog Signal Range RON RON RON Drift RON Match LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) ADG438F ADG439F Channel ON Leakage ID , IS (ON) ADG438F ADG439F FAULT Output Leakage Current (With Overvoltage) Input Leakage Current (With Overvoltage) Input Leakage Current (With Power Supplies OFF) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tTRANSITION tOPEN tON (EN) tOFF (EN) tSETT, Settling Time 0.1% 0.01% Charge Injection OFF Isolation Channel-to-Channel Crosstalk CS (OFF) CD (OFF) ADG438F ADG439F POWER REQUIREMENTS IDD ISS
(VDD = +15 V, VSS = -15 V, GND = 0 V, unless otherwise noted)
+25 C B Version -40 C to +85 C VSS + 1.2 VDD - 0.8 400 5 0.6 3 0.01 0.5 0.01 0.5 0.5 0.01 0.5 0.5 0.02 0.1 0.005 0.1 0.001 0.1 3 -40 C to +105 C VSS + 1.2 VDD - 0.8 400 5 3 Units V min V max max % max %/C typ % max nA typ nA max nA typ nA max nA max nA typ nA max nA max nA typ A max A typ A max A typ A max V min V max A max pF typ ns typ ns max ns min ns typ ns max ns typ ns max s typ s typ pC typ dB typ dB typ pF typ pF typ pF typ mA typ mA max mA typ mA max VIN = 0 V or 5 V VIN = 0 or V DD Test Conditions/Comments
-10 V < VS < +10 V, IS = 1 mA; -5 V < VS < +5 V, IS = 1 mA; VS = 0 V, IS = 1 mA VS = 10 V, IS = 1 mA VD = 10 V, VS = Test Circuit 2 VD = 10 V, VS = Test Circuit 3 VS = VD = 10 V; Test Circuit 4 10 V; 10 V;
2 5 5 5 5 2 1 1 2.4 0.8 1
5 30 15 30 15 10 2 4 2.4 0.8 1
VS = -33 V, +33 V or +50 V, VD = 0 V, Test Circuit 3 VS = 25 V, VD = 10 V, Test Circuit 5
VS = 25 V, VD = V EN = A0, A1, A2 = 0 V Test Circuit 6
5 170 220 10 200 250 110 150
300 10 300 180 0.5 1.7
320 10 300 180 0.5 1.7
RL = 1 M, C L = 35 pF; VS1 = 10 V, V S8 = 10 V; Test Circuit 7 RL = 1 k, CL = 35 pF; VS = +5 V; Test Circuit 8 RL = 1 k, CL = 35 pF; VS = +5 V; Test Circuit 9 RL = 1 k, CL = 35 pF; VS = +5 V; Test Circuit 9 RL = 1 k, CL = 35 pF; VS = +5 V VS = 0 V, RS = 0 , CL= 1 nF; Test Circuit 10 RL = 1 k, CL = 15 pF, f = 100 kHz; VS = 7 V rms; Test Circuit 11 RL = 1 k, CL = 15 pF, f = 100 kHz; VS = 7 V rms; Test Circuit 12
4 80 85 5 50 25 0.05 0.15 0.01 0.02
0.25 0.04
0.25 0.04
NOTES 1 Temperature range is as follows: B Version: -40C to +105C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
-2-
REV. D
ADG438F/ADG439F
ABSOLUTE MAXIMUM RATINGS*
(TA = +25C unless otherwise noted)
Table I. ADG438F Truth Table
A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 ON SWITCH NONE 1 2 3 4 5 6 7 8
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +25 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to -25 V VEN, VA Digital Input . . . . . . . - 0.3 V to VDD + 2 V or 20 mA, Whichever Occurs First VS, Analog Input Overvoltage with Power ON . . . . . VSS - 25 V to VDD + 40 V VS, Analog Input Overvoltage with Power OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40 V to +55 V Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 20 mA Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle max) . . . . . . . . . . . 40 mA Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . -40C to +105C Storage Temperature Range . . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150C Plastic Package JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 117C/W Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260C SOIC Package JA, Thermal Impedance Narrow Body . . . . . . . . . . . . . . . . . . . . . . . . . . . 125C/W Wide Body . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
X = Don't Care
Table II. ADG439F Truth Table
A1 X 0 0 1 1 A0 X 0 1 0 1 EN 0 1 1 1 1 ON SWITCH PAIR NONE 1 2 3 4
X = Don't Care
ADG438F/ADG439F PIN CONFIGURATIONS DIP/SOIC
A0 1 EN 2 VSS 3 S1 4 S2 5 S3 6 16 A1 15 A2 14 GND 13 VDD TOP VIEW (Not to Scale) 12 S5 11 S6 10 S7 9 S8 A0 1 EN 2 VSS 3 S1A 4 S2A 5 S3A 6 S4A 7 DA 8
DIP/SOIC
16 A1 15 GND 14 VDD 13 S1B TOP VIEW (Not to Scale) 12 S2B 11 S3B 10 S4B 9 DB
ADG438F
ADG439F
ORDERING GUIDE
S4 7 D8
Model ADG438FBN ADG438FBR ADG439FBN ADG439FBR ADG439FBRW
Temperature Range -40C to +105C -40C to +105C -40C to +105C -40C to +105C -40C to +105C
Package Option* N-16 R-16N N-16 R-16N R-16W
*N = Plastic DIP; R-16N = 0.15" Small Outline IC (SOIC); R-16W = 0.3" Small Outline IC (SOIC).
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG438F/ADG439F features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic dischar ges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. D
-3-
ADG438F/ADG439F
TERMINOLOGY
Typical Performance Graphs
Most positive power supply potential. Most negative power supply potential. Ground (0 V) reference. Ohmic resistance between D and S. RON variation due to a change in the analog input voltage with a constant load current.
RON - 2000 TA = +25 C 1750 1500 1250 1000 750 500 250 0 -15 VDD = +10V VSS = -10V VDD = +15V VSS = -15V -10 -5 0 5 VD (VS) - Volts 10 15 VDD = +5V VSS = -5V
VDD VSS GND RON RON RON Drift RON Match IS (OFF) ID (OFF) ID, IS (ON) VD (VS ) CS (OFF) CD (OFF) CD, CS (ON) CIN tON (EN)
Change in RON when temperature changes by one degree Celsius. Difference between the RON of any two channels. Source leakage current when the switch is off. Drain leakage current when the switch is off. Channel leakage current when the switch is on. Analog voltage on terminals D, S. Channel input capacitance for "OFF" condition.
Figure 1. On Resistance as a Function of VD (VS)
1m 100 IS - INPUT LEAKAGE - A 10 1 100n OPERATING RANGE 10n 1n 100p 10p 1p -50 -40 -30 -20 -10 0 10 20 30 VIN - INPUT VOLTAGE - Volts VDD = 0V VSS = 0V VD = 0V
Channel output capacitance for "OFF" condition. "ON" switch capacitance. Digital input capacitance. Delay time between the 50% and 90% points of the digital input and switch "ON" condition. Delay time between the 50% and 90% points of the digital input and switch "OFF" condition. Delay time between the 50% and 90% points of the digital inputs and the switch "ON" condition when switching from one address state to another. "OFF" time measured between 80% points of both switches when switching from one address state to another. Maximum input voltage for Logic "0". Minimum input voltage for Logic "1". Input current of the digital input. A measure of unwanted signal coupling through an "OFF" channel. A measure of the glitch impulse transferred from the digital input to the analog output during switching. Positive supply current. Negative supply current.
tOFF (EN)
40
50
60
tTRANSITION
Figure 2. Input Leakage Current as a Function of VS (Power Supplies OFF) During Overvoltage Conditions
tOPEN
1m 100 ID - OUTPUT LEAKAGE - A 10 1 100n OPERATING RANGE 10n 1n 100p 10p 1p -50 -40 VDD = +15V VSS = -15V VD = 0V
VINL VINH IINL (IINH) Off Isolation Charge Injection
IDD ISS
-30 -20 -10 0 10 20 30 VIN - INPUT VOLTAGE - Volts
40
50
60
Figure 3. Output Leakage Current as a Function of V S (Power Supplies ON) During Overvoltage Conditions
-4-
REV. D
ADG438F/ADG439F
2000 1750 LEAKAGE CURRENTS - nA 1500 1250 RON - 1000 750 500 250 +25 C 0 -15 -10 -5 0 5 VD (VS) - Volts 10 15 0.01 25 35 45 55 65 75 TEMPERATURE - C 85 95 105 +105 C +85 C VDD = +15V VSS = -15V 10 100 VDD = +15V VSS = -15V VD = +10V VS = -10V ID (OFF) 1 IS (OFF) 0.1 ID (ON)
Figure 4. On Resistance as a Function of VD (VS) for Different Temperatures
Figure 7. Leakage Currents as a Function of Temperature
1m 100 10 IS - INPUT LEAKAGE - A 1 VDD = +15V VSS = -15V VD = 0V
260 VIN = +2V 240 220 200
tON (EN)
t - ns
OPERATING RANGE
100n 10n 1n 100p 10p 1p -50 -40 -30 -20 -10 0 10 20 30 VS - INPUT VOLTAGE - Volts 40 50 60
180 160 140 120 100 10
tTRANSITION tOFF (EN)
11
12 13 VSUPPLY - Volts
14
15
Figure 5. Input Leakage Current as a Function of VS (Power Supplies ON) During Overvoltage Conditions
Figure 8. Switching Time vs. Power Supply
0.3 VDD = +15V VSS = -15V TA = +25 C IS (OFF) 0.1
280 260 240 220 VDD = +15V VSS = -15V VIN = +5V
LEAKAGE CURRENTS - nA
0.2
tON (EN)
t - ns
ID (OFF)
200
tTRANSITION
180 160 140 120
0.0 ID (ON)
-0.1
tOFF (EN)
45 65 TEMPERATURE - C 85 105
-0.2 -14
-10
-6
-2 2 VS, VD - Volts
6
10
14
100 25
Figure 6. Leakage Currents as a Function of V D (V S)
Figure 9. Switching Time vs. Temperature
REV. D
-5-
ADG438F/ADG439F
THEORY OF OPERATION
The ADG438F/ADG439F multiplexers are capable of withstanding overvoltages from -40 V to +55 V, irrespective of whether the power supplies are present or not. Each channel of the multiplexer consists of an n-channel MOSFET, a p-channel MOSFET and an n-channel MOSFET, connected in series. When the analog input exceeds the power supplies, one of the MOSFETs will switch off, limiting the current to sub-microamp levels, thereby preventing the overvoltage from damaging any circuitry following the multiplexer. Figure 12 illustrates the channel architecture that enables these multiplexers to withstand continuous overvoltages. When an analog input of VSS + 1.2 V to VDD - 0.8 V is applied to the ADG438F/ADG439F, the multiplexer behaves as a standard multiplexer, with specifications similar to a standard multiplexer, for example, the on-resistance is 180 typically. However, when an overvoltage is applied to the device, one of the three MOSFETs will turn off. Figures 10 to 13 show the conditions of the three MOSFETs for the various overvoltage situations. When the analog input applied to an ON channel approaches the positive power supply line, the n-channel MOSFET turns OFF since the voltage on the analog input exceeds the difference between VDD and the
+55V OVERVOLTAGE n-CHANNEL MOSFET IS OFF VDD VSS Q1 Q2 Q3
n-channel threshold voltage (VTN). When a voltage more negative than VSS is applied to the multiplexer, the p-channel MOSFET will turn off since the analog input is more negative than the difference between VSS and the p-channel threshold voltage (VTP). When the power supplies are present but the channel is off, again either the p-channel MOSFET or one of the n-channel MOSFETs will remain off when an overvoltage occurs. Finally, when the power supplies are off, the gate of each MOSFET will be at ground. A negative overvoltage switches on the first n-channel MOSFET but the bias produced by the overvoltage causes the p-channel MOSFET to remain turned off. With a positive overvoltage, the first MOSFET in the series will remain off since the gate to source voltage applied to this MOSFET is negative. During fault conditions, the leakage current into and out of the ADG438F/ADG439F is limited to a few microamps. This protects the multiplexer and succeeding circuitry from over stresses as well as protecting the signal sources which drive the multiplexer. Also, the other channels of the multiplexer will be undisturbed by the overvoltage and will continue to operate normally.
Q1 Q2 Q3
+55V OVERVOLTAGE n-CHANNEL MOSFET IS OFF
Figure 10. +55 V Overvoltage Input to the ON Channel
-40V OVERVOLTAGE n-CHANNEL MOSFET IS ON VSS VDD Q1 Q2 Q3
Figure 12. +55 V Overvoltage with Power OFF
-40V OVERVOLTAGE n-CHANNEL MOSFET IS ON Q1 Q2 Q3
p-CHANNEL MOSFET IS OFF
p-CHANNEL MOSFET IS OFF
Figure 11. -40 V Overvoltage on an OFF Channel with Multiplexer Power ON
Figure 13. -40 V Overvoltage with Power OFF
Test Circuits
IDS VDD VSS VSS S1 D S2 S8 EN VS VD +0.8V EN VS +0.8V D VDD VSS VDD S1 S2 VS S D S8 VDD VSS ID (OFF) A VD
V1
IS (OFF) A
R ON = V1 /I DS
Test Circuit 1. On Resistance
Test Circuit 2. I S (OFF)
Test Circuit 3. ID (OFF)
-6-
REV. D
ADG438F/ADG439F
VDD VSS VDD VSS 0V 0V VDD S1 S2 S8 VS EN +2.4V VSS D A VD S8 EN VS +0.8V VD ID (ON) A VDD S1 S2 D VSS VDD 0V A2 A1 A0 EN GND VSS S1 A VS
ADG438F*
S8 D
* SIMILAR CONNECTION FOR ADG439F
Test Circuit 4. ID (ON)
Test Circuit 5. Input Leakage Current (with Overvoltage)
Test Circuit 6. Input Leakage Current (with Power Supplies OFF)
VDD VDD A2 VIN 50 A1 A0
VSS VSS S1 VS1 VS8
3V
ADDRESS DRIVE (VIN)
50%
50%
S2 THRU S7 S8
ADG438F*
+2.4V EN GND D RL 1M CL 35pF VOUT
90%
VOUT
90%
* SIMILAR CONNECTION FOR ADG439F
tTRANSITION
tTRANSITION
Test Circuit 7. Switching Time of Multiplexer, tTRANSITION
VDD
VSS 3V VS
VDD A2 VIN 50 A1 A0
VSS S1
S2 THRU S7
ADDRESS DRIVE (VIN)
ADG438F*
+2.4V EN GND
S8 D RL 1k CL 35pF VOUT 80% 80%
VOUT
* SIMILAR CONNECTION FOR ADG439F
tOPEN
Test Circuit 8. Break-Before-Make Delay, tOPEN
VDD VDD A2 A1 A0 EN VIN 50 GND
VSS 3V VSS S1 VS
ENABLE DRIVE (VIN)
0V
50%
50%
S2 THRU S8
ADG438F*
D RL 1k CL 35pF VOUT
tOFF (EN)
VO 0.9VO 0.9VO
OUTPUT
0V
* SIMILAR CONNECTION FOR ADG439F
tON (EN)
Test Circuit 9. Enable Delay, t ON (EN), t OFF (EN)
REV. D
-7-
ADG438F/ADG439F
VDD VSS 3V VDD VSS A2 A1 ADG438F* A0 D S EN VIN GND CL 1nF
LOGIC INPUT (VIN)
0V VOUT
RS VS
Q INJ = CL
VOUT
* SIMILAR CONNECTION FOR ADG439F
Test Circuit 10. Charge Injection
VDD VDD A2 A1 A0 EN GND VSS VDD VSS
S1 S8 VS VOUT RL 1k 1k VS
ADG438F*
D
VDD VSS 2.4V A0 EN A1 ADG438F* A2 D S1 S2 S8 GND 1k
VOUT
VSS * SIMILAR CONNECTION FOR ADG439F
CROSSTALK = 20 LOG VOUT/VIN * SIMILAR CONNECTION FOR ADG439F
Test Circuit 11. OFF Isolation
Test Circuit 12. Channel-to-Channel Crosstalk
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Plastic (N-16)
0.840 (21.34) 0.745 (18.92)
16 1 9 8
0.280 (7.11) 0.240 (6.10) 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN
PIN 1 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) BSC
0.325 (8.26) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93)
0.070 (1.77) SEATING 0.045 (1.15) PLANE
0.015 (0.381) 0.008 (0.204)
0.4133 (10.50) 0.3977 (10.00)
16 9 16 1
0.3937 (10.00) 0.3859 (9.80)
9 8
0.4193 (10.65) 0.3937 (10.00)
0.2992 (7.60) 0.2914 (7.40)
0.1574 (4.00) 0.1497 (3.80)
0.2440 (6.20) 0.2284 (5.80)
1
8
PIN 1 0.0098 (0.25) 0.0040 (0.10) 0.0291 (0.74) x 45 0.0098 (0.25)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) 0.0099 (0.25)
45
PIN 1 0.0118 (0.30) 0.0040 (0.10)
0.1043 (2.65) 0.0926 (2.35)
SEATING PLANE
0.0500 (1.27) BSC
8 0.0192 (0.49) 0 0.0099 (0.25) 0.0138 (0.35) 0.0075 (0.19)
0.0500 (1.27) 0.0160 (0.41)
0.0500 (1.27) BSC
8 0.0192 (0.49) 0 SEATING 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23)
0.0500 (1.27) 0.0157 (0.40)
-8-
REV. D
PRINTED IN U.S.A.
16-Lead SOIC (R-16W) (Wide Body)
16-Lead SOIC (R-16N) (Narrow Body)
C1992c-0-2/00 (rev. D)
VOUT
VOUT

▲Up To Search▲

Price & Availability of ADG438

	To Download ADG438 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .